Homework 6 - Chapters 6 and 7

Due: Friday, March 13, 2009 at 5:00pm
  1. (2pts) Describe the challenges that are presented when doing exception handling in a pipelined datapath.
  2. (2pts) What is the difference between precise interrupts and imprecise interrupts.
  3. (6pts) Answer the following questions about loop unrolling. Assume the code is scheduled for fast execution on the MIPS pipeline and branches resolve in the MEM stage when answering.
    1. Unroll the following loop code once (i.e. it will now have two iterations is one loop body).
               Loop:  lw  $t1, 0($s0)
                      add $v0, $v0, $t1
                      add $s0, $s0, $s2
                      slt $t0, $s0, $s1
                      beq $t0, $s3, Loop
              
    2. Show the schedule for the original loop.
    3. Show the schedule for the unrolled loop.
  4. (4pts) Using the code from Question 3, unroll the loop three times so that it contains four iterations in one loop body. Assume the loop always executes a multiple of four times.
    1. Show the unrolled loop.
    2. Schedule the loop on the static multiple-issue version of the MIPS pipeline.
  5. (6pts) Cache performance depends on the nature of the program being executed. For the following characteristics, give an example of a program which would display those characteristics. Justify why your example would display these characteristics.
    1. Low temporal locality and low spatial locality
    2. High temporal locality and low spatial locality
    3. Low temporal locality and high spatial locality