Dr. Melissa Danforth

Computer and Electrical Engineering and Computer Science Department
California State University, Bakersfield

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Computer Architecture CMPS 321 - Winter 2007
Course meets MWF 9:30am - 10:55am in Sci 414 Tu 8:00am - 10:25am in Sci 407
Course Description
This course follows the Digital Logic Design course and focuses on the design of the CPU and computer system at the architectural (or functional) level: CPU instruction sets and functional units, data types, control unit design, interrupt handling and DMA, I/O support, memory hierarchy, virtual memory, and buses and bus timing. In contrast, the Digital logic Design course is primarily concerned with implementation; that is, the combinatorial and sequential circuits which are the building blocks of the functional units.
CMPS 223 and 320
Computer Organization and Design, 3rd edition. David A. Patterson and John L. Hennessy. Publisher: Morgan Kaufmann Publishers, 2005. ISBN: 1-55860-604-1.